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==Biography==
{{Biography
 
|Associated organizations=IBM
An [[IEEE Fellow Grade History|IEEE Fellow]], David J. Frank is a research staff member at the IBM T.J. Watson Research Center in Yorktown Heights, New York. The insight provided by Dr. Frank, Massimo V. Fischetti, and Steven E. Laux in understanding the physical effects that occur in electronic devices at small dimensions has been key to silicon technology evolving at a rapid pace. Their collective work on the development and application of modeling and simulation tools over the past 20 years have provided guidance during the early stages of the design cycle, reducing R&D costs for future nanotechnology. Drs. Fischetti and Laux developed the full-band Monte Carlo simulation program DAMOCLES, which shed light on the physics governing electron transport in semiconductor devices. The tool is considered the gold standard for device modeling with its ability to capture realistic physical properties in small silicon transistors, explaining key phenomena and suggesting new directions for research. Drs. Fischetti, Frank, and Laux demonstrated 30-nn gate lengths in silicon transistors in 1992, at a time when industry thought it difficult to scale to transistor gate lengths below 100-nm. With impact still being felt today, their work sparked worldwide interest in pursuing the double-gate transistor structure as the ultimately scaled silicon transistor.
|Fields of study=Semiconductors
}}
An [[IEEE Fellow Grade History|IEEE Fellow]], David J. Frank is a research staff member at the IBM T.J. Watson Research Center in Yorktown Heights, New York. The insight provided by Dr. Frank, [[Massimo V. Fischetti|Massimo V. Fischetti]], and [[Steven E. Laux|Steven E. Laux]] in understanding the physical effects that occur in electronic devices at small dimensions has been key to silicon technology evolving at a rapid pace. Their collective work on the development and application of modeling and simulation tools over the past 20 years have provided guidance during the early stages of the design cycle, reducing R&D costs for future nanotechnology. Drs. Fischetti and Laux developed the full-band Monte Carlo simulation program DAMOCLES, which shed light on the physics governing electron transport in semiconductor devices. The tool is considered the gold standard for device modeling with its ability to capture realistic physical properties in small silicon transistors, explaining key phenomena and suggesting new directions for research. Drs. Fischetti, Frank, and Laux demonstrated 30-nn gate lengths in silicon transistors in 1992, at a time when industry thought it difficult to scale to transistor gate lengths below 100-nm. With impact still being felt today, their work sparked worldwide interest in pursuing the double-gate transistor structure as the ultimately scaled silicon transistor.


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[[Category:Components,_circuits,_devices_&_systems]]
[[Category:Computing and electronics]]

Latest revision as of 16:30, 21 January 2016

David J. Frank
Associated organizations
IBM
Fields of study
Semiconductors

Biography

An IEEE Fellow, David J. Frank is a research staff member at the IBM T.J. Watson Research Center in Yorktown Heights, New York. The insight provided by Dr. Frank, Massimo V. Fischetti, and Steven E. Laux in understanding the physical effects that occur in electronic devices at small dimensions has been key to silicon technology evolving at a rapid pace. Their collective work on the development and application of modeling and simulation tools over the past 20 years have provided guidance during the early stages of the design cycle, reducing R&D costs for future nanotechnology. Drs. Fischetti and Laux developed the full-band Monte Carlo simulation program DAMOCLES, which shed light on the physics governing electron transport in semiconductor devices. The tool is considered the gold standard for device modeling with its ability to capture realistic physical properties in small silicon transistors, explaining key phenomena and suggesting new directions for research. Drs. Fischetti, Frank, and Laux demonstrated 30-nn gate lengths in silicon transistors in 1992, at a time when industry thought it difficult to scale to transistor gate lengths below 100-nm. With impact still being felt today, their work sparked worldwide interest in pursuing the double-gate transistor structure as the ultimately scaled silicon transistor.