6 December 2013
- 23:3623:36, 6 December 2013 diff hist +382 N File:SPARC Patent US7209996B2.pdf SPARC patent on multi-thread and multi-core implementations. SPARC led the way in chip multi-threading implementations. SPARC has the highest number of threads implemented in any commercial processor today. This is translating into the highest through-put
- 23:3323:33, 6 December 2013 diff hist +178 N File:SPARC Patent x4198A.pdf Patent to implement fast cache accesses required for high-performance applications including HPC applications. -> Creation complete
- 23:1323:13, 6 December 2013 diff hist +240 N File:2001 Financial Express India.pdf UltraSPARC III, Cheetah core based CPU announced in Financial Express. Cheetah was the highest performance processor with multiple world records at the time of its release. -> Creation complete
- 23:1123:11, 6 December 2013 diff hist +105 N File:Fujitsu Press Release 1987.pdf 1987 Fujitsu Press release for SPARC -> Creation complete
- 23:1023:10, 6 December 2013 diff hist +184 N File:2001 The Register on US-3 - Annc.pdf UltraSPARC III, Cheetah core based CPU announced. The product was announced in New York in a machine named Excalibur -> Creation complete
- 23:0823:08, 6 December 2013 diff hist +194 N File:2000 The Register on US-3.pdf UltraSPARC III based upon Cheetah architecture released to the market. This was the highest performance processor of the time. -> Creation complete
- 23:0723:07, 6 December 2013 diff hist +168 N File:1999 Fujitsu Sun Press Release-1 - JRC with FJ.pdf Sun SPARC and Fujitsu for Joint Research council to develop SPARC which was/is an open architecture. -> Creation complete
- 23:0523:05, 6 December 2013 diff hist +164 N File:1998 CNET on US-3-1 - Rdmap.pdf UltraSPARC III roadmap revealed. USIII was key in enabling dot-com internet era along with USII. -> Creation complete
- 22:4822:48, 6 December 2013 diff hist +276 N File:1997 Systeme (German).pdf Early UltraSPARC roadmap. SPARC transitions over to UltraSPARC V9 implementation. A major breakthrough in performance improvement with the implementation of 64bit instructions and large addressing capability, -> Creation complete
- 22:4222:42, 6 December 2013 diff hist +172 N File:1996 April Electronic News - embedded SPARC.pdf SPARC implemented for embedded space. SPARC then ported for RADHARD applications for space applications. -> Creation complete
- 22:3822:38, 6 December 2013 diff hist +117 N File:1995 Sun Press Release for US-I 1st VIS.pdf SPARC was first to introduce SIMD in a processor. -> Creation complete
- 22:3522:35, 6 December 2013 diff hist +140 N File:SPARC-TI fabless model.pdf Sun SPARC to be made in fabless model with TI providing Turnkey service. -> Creation complete
22 November 2013
- 23:2823:28, 22 November 2013 diff hist +632 N File:1991 SPARC Anant Robert Paper.pdf SPARC technical paper: A number of new features were introduced at the time by SPARC and specifically aimed at returning performance - a high business value. The architecture was licensed by numerous companies specifically because of the performance deliv
- 23:2023:20, 22 November 2013 diff hist +499 N File:1988 - LSI mfg.pdf SPARC manufacturing agreement was signed with LSI. SPARC pioneered the fabless manufacturing model when it signed an agreement with LSI for manufacturing the high-performance processor. An agreement was signed with LSI for manufacturing the chipset as wel
- 23:1623:16, 22 November 2013 diff hist +311 N File:1987 Oct Wall Street Journal - Xerox-SPARC lic.pdf SPARC is designed in by Xerox corporation. In order to boost the performance of Xerox's word processing capabilities, Xerox starts using SPARC systems. SPARC gained enormous number of key wins in numerous applications and this was one of them. -> Creation
- 23:1223:12, 22 November 2013 diff hist +293 N File:1987 March 10 San Jose Mercury News - Unisys-Sun lic.pdf SPARC designs were licensed by Unisys aimed at boosting their mainframe performance. Unisys was the second largest mainframe supplier behind IBM and SPARC design license would provide them the ability to effectively compete. -> Creation complete
- 23:0023:00, 22 November 2013 diff hist +309 N File:1987 Computer system news 10MIPs.pdf First SPARC processor achieves 10MIPs. As compared to the leader, VAX, SPARC demonstrated performance was 10times that of VAX as measured in VAX MIPS. It was truly an achievement at that time making SPARC the leader in Processor performance -> Creation c
29 July 2013
- 06:3806:38, 29 July 2013 diff hist +297 N Special:Badtitle/NS90:Milestone-Proposal talk:SPARC RISC Architecture Introduction, 1987/Starting point - completion of form/reply (3) Reply to Starting point - completion of form
9 July 2013
- 22:3022:30, 9 July 2013 diff hist −1 Milestone-Proposal:SPARC RISC Architecture Introduction, 1987 No edit summary
- 06:2406:24, 9 July 2013 diff hist +5 Milestone-Proposal:SPARC RISC Architecture Introduction, 1987 No edit summary
6 July 2013
- 19:2419:24, 6 July 2013 diff hist +49 m Milestone-Proposal:SPARC RISC Architecture Introduction, 1987 Added File Attachment SPARCpatents.pdf -> Creation failed: Unsupported filetype!
- 19:2419:24, 6 July 2013 diff hist +68 N File:SPARCpatents.pdf -> Creation complete
- 19:0219:02, 6 July 2013 diff hist −8 Milestone-Proposal:SPARC RISC Architecture Introduction, 1987 No edit summary
